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Charge pump voltage doubler simulation: Twice the voltage, no inductor

Four switches and a flying capacitor stack a 5 V supply on itself.

Watch it built from an empty canvas · CLK 10 kHz · C1 = 10 µF · C2 = 100 µF · RL = 1 kΩ · real desktop recording, no sound · 1:32
Read the transcript
  1. Start with a 5 V supply.
  2. Add four voltage-controlled switches.
  3. C1 moves charge, C2 holds it, R1 is the load.
  4. Add a 10 kHz PWM clock and grounds.
  5. Press W, then wire the power path.
  6. Wire the clock to every switch.
  7. S3, S4: threshold −2.5 V, the other phase.
  8. Type C1 = 10u and C2 = 100u.
  9. Run a 10 ms transient.
  10. Probe VOUT: 5 V in, 9.9 V out.
  11. Change one thing: C1 = 1u.
  12. Run 100 ms: slower, and lower: ≈ 9.1 V.

Run the experiment.

Run Transient for 10 ms with a 1 µs output step and plot the load voltage. It climbs in steps, one per clock period, and settles at 9.90 V: 10 V minus the drop across the converter's output resistance 1/(f·C1) = 10 Ω.

What the simulation shows.

Measured in the desktop solver after start-up:

  • Output: 9.900 V across 1 kΩ (predicted 9.901 V; ngspice 9.901 V)
  • Ripple: 9.47 mV peak to peak (predicted 9.45 mV)
  • Input current: about 20 mA, twice the 9.9 mA load current; efficiency 99 %
  • Start-up: 6.12 V after 1 ms, 9.82 V after 5 ms

Now change one thing.

Change C1 to 1 µF. Predict 1/(f·C1) = 100 Ω and 10 V × 1000 / 1100 ≈ 9.09 V, then run 100 ms with a 5 µs step: start-up is now about ten times slower, and the output settles at 9.090 V.

Make the prediction before pressing Run. After changing a component value, the previous result is marked out of date until you run it again.

Know the assumptions.

The voltage-controlled switches are idealized: 10 mΩ on, no switching loss, dead time or gate charge. Real charge-pump chips have tens of ohms of output resistance, mostly from their switches.